Announcement_ojsscs

Our new publication “Non-Volatile Digital Compute-in-Memory Macro with Ferroelectric FET-based Voltage Divider Weight Cells Featuring Power-Gating” has been accepted by OJ-SSCS now! In this work, we present a non-volatile digital CIM (nvDCIM) macro in GlobalFoundries 28-nm, utilizing a novel dual FeFET voltage divider bitcell for lossless MAC operations with non-volatile weight storage. Power-gating enables 77.7% total power reduction at 1% activity factor with no weight-reload penalty, while active compute achieves 106.6 TOPS/W — competitive with conventional SRAM-based DCIM. The macro matches software baseline accuracy (89.66%) on CIFAR-10 with VGG-8.